Here is a table that maps the ASIC with the "Available ports and Disabled ports" after performing port
channelization in the QFX10000-30C line card:
Table: Port Mapping for Channelization
ASIC Available Ports Disabled Port
PE0 0, 2, 4, 8 6
PE1 10, 12, 14,18 16
PE2 20, 22, 24,28 26
PE3 1, 3, 5, 9 7
PE4 11, 13, 15,19 17
PE5 21, 23, 25,29 27
Here, the physical ports associated with PE0 ASIC are 0, 2, 4, 6 and 8. The documentation mentions that every 5th port is disabled once port channelization is performed. This would mean that the fifth port is port 8 and port 8 must have been disabled for PE0. But the documentations shows port 6 being as disabled for PE0. Similary for the ASICs PE1, PE2, PE3, PE4 and PE5 the fifth must have been 18,29,9,19 and 29 while the documentation shows the fifth disabled port as 16,26,7,17 and 27.
Could someone please help very if I am understanding the logic incorrectly, or the documentation needs to
be updated?
Here is the juniper documentation being referenced:
Many thanks,
B